The computer crashes if one of the following conditions is triggered (that is, the error events act as an OR gate): For example, a redundant system with two sensors will fail if both sensors are not working.įigure 1 shows an FTA that represents the condition of a failure of a computer. This representation captures the fact that a fault depends on several failures. The failure under analysis is the tree's root node and all related contributing factors are its leaf nodes.įTA's logic includes gates that show the logical relationship (AND, OR) between error events in the tree. Unlike FMEA, which is a bottom-up method that shows the impact of every failure throughout the architecture, FTA defines a tree. In this blog post, I present the concepts of the FTA and introduce a new tool to design and analyze fault trees.įTA is a top-down safety analysis method. One popular type of safety analysis is Fault Tree Analysis (FTA), which provides a graphical representation of all contributors to a failure (e.g., error events and propagations). Standards such as ARP4761 mandate several analyses, such as Functional Hazard Assessment (FHA) and Failure Mode and Effect Analysis (FMEA). For example, if you are producing a quadcopter drone, you would like to know the probability of engine failure to evaluate the system's reliability. Each potential error, failure, or defect must be considered and evaluated before you release a new product. Safety-critical software must be analyzed and checked carefully.
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